Parallel Batch RF Test
Mass production of components brings its own issues to the test environment. A pragmatic approach to the tests performed must be taken, concentrating upon validation of a correctly built and working product and not full design testing. Test times need to be reduced to a minimum without compromising quality and we must make efficient use of resources.
This product is a small RF device with receive and transmit capability at around 1GHz. It has a PIC device which needs to be loaded with test firmware and if successful with testing would require a operational firmware load and final configuration.
Concentrating on production test and functionality, low cost RF equipment was identified as having sufficient capability to perform the tests required leading to the selection of a Rigol DMM, Spectrum Analyser and Function Generator
The ATE solution was completed with a simple single channel PSU, USB DAQ device, PIC programmer and relay boards.
The software was written in LabVIEW using an object orientated architecture and a number of asynchronous processes providing a scalable solution.
The sequence of tests and their test parameter configuration files are configurable using a simple ASCII text file. Allowing calling of any the available tests plus a number of utility functions such as rendezvous, single entry, single only, parallel and delay.
Test parameter files are written in XML and loaded into the test code based upon the parameter argument held within the sequence configuration file. This architecture allows for the standard tests to be called multiple times with different settings allowing for example spurious measurements with both wideband and narrowband configurations. Other advantages are this allows a certain amount of...
| Although the system requirement only called for a summary results file in csv format
to allow simple tracking of production yield, all of the measurement data is dumped
to a binary TDMS results file per unit serial number. This has allowed the design engineers
to pinpoint production issues and analyse results spread remotely when required.
The batch testing utilised a software asset locking mechanism to handle the hardware assets during the parallel test sequences, only locking the HW assets required for the current test. With some careful ordering of tests this has allow a level of pipelining leading to a lower overall test time per DUT.
The GUI was designed to be simple, intuitive and multilingual which has been well received by the local test operators. Strings used for the GUI and any of the test messages are loaded in a tab delimited ASCII text file with the English and A.N.Other language. These strings are then replace throughout the software either on start up in the case of the GUI or at runtime for the test messages. The test language file forms part of the system software configuration. DUT serial numbers are entered using a barcode scanner and 1D or 2D barcodes printed on the devices.
|A simple calibration routine has been provided to allow the periodic validation or
recalibration of the RF losses within the test system.